AD5697RBRUZ Ethernet ICs Sgl Port Ethernet Phys Layer Xcvr
Product Description
Productum attributum | Precium attributum |
Fabrica: | Analoga Fabrica Inc. |
Product Category: | Digital to Analog Converters - DAC |
RoHS: | Singula |
Series: | AD5697R |
Consilium: | 12 bit |
Sampling Rate: | - |
Numerus canalium: | 2 Channel |
Tempus constituendi: | 7 us |
Output Type: | intentione Buffered |
Interface Type: | 2-filum, I2C |
Analoga Supple Voltage: | 2.7 V ad 5.5 V |
Digital Supple intentione: | 1.62 V ad 5.5 V |
Minimum Operating Temperature: | - 40 C |
Maximum Operating Temperature: | + 105 C |
Adscendens Style: | SMD/SMT |
Sarcina / Case: | TSSOP-16 |
Packaging: | Tubus |
Notam: | Analog Devices |
Progressus Ornamentum: | EVAL-AD5697RSDZ |
DNL - Differentialis Nonlinearity: | +/- 1 LSB |
INL - Integral Nonlinearity: | +/- 1 LSB |
Product Type: | DACs - Digital ad Analog Converters |
Factory Pack Quantity: | 96 |
Subcategoria: | Data Converter ICs |
Supple intentione - Max: | 5.5 V |
Supple intentione - Min: | 1.8 V |
Unitas pondus: | 0.00702 oz |
♠ Dual, 12-Bit nanoDAC+ cum 2 ppm/°C Relatio, I2 C interface
AD5697R, membrum familiae nanoDAC+™ est humilis potentia, dualis, 12-bit quiddam quiddam voltage output digitalis ad analogum convertentis (DAC).Cogitatus includit respectum internum 2.5 V, 2 ppm/°C (per defaltam datum) et quaestum selectorum clavum praegrande output 2.5 V (lucrum = 1) vel V (lucrum = 2).AD5697R ab una 2.7 V ad 5.5 V copia operatur, consilio monotonica praestatur, et minus ostendit quam 0.1% FSR errorem quaestum et 1.5 mV cinguli erroris effectum.Cogitatus praesto est in 3 mm × 3 mm LFCSP et involucrum TSSOP.
Etiam AD5697R insitum in reset circuitionis vim et RSTSEL clavum iniungit ut potestatem DAC outputs ad scalam nulla vel medium scateat et ibi remaneat donec validum scriptionis locum obtineat.Pluma per canalem potentiae descendentis continet, quae hodiernam consumptionem machinae ad 4 µA ad 3 V dum modo in potentia deprimit reducit.
AD5697R versatile 2 filum Vide interface quod operatur ad rates horologii usque ad 400 kHz et includit clavum VLOGICUM destinatum ad logicam 1.8 V/3 V/5 V.
Maximum drift 2.5 V reference: 2 ppm/°C typicum
Sarcina minima: 3 mm × 3 mm, 16-plumbum LFCSP
Totalis error incomprehensibilis (TUE): ± 0.1% plena eu rhoncus (FSR) maximum
Error cinguli: ±1.5 mV maximum
Lucrum errorem: ±0.1% of FSR maximum
Princeps coegi facultatem: 20 mA, 0.5 V e cancellis supplent
User selectable quaestum 1 vel 2 (CONDITUS pin)
Reset ut nulla scala vel midscale (RSTSEL pin)
1.8 V logicae convenientiae
Minimum glitch: 0.5 nV-sec
400 kHz I2C-compatible Vide interface
Humilis potentia: 3.3 mW ad 3 V
2.7 V ad 5.5 V copia
-40°C ad +105°C temperatus range
Basi statione virtutis amplifiers
Processus controllata (logica programmabilis moderatoris [PLC] I/O cards)
Industriae automation
Data systemata acquisition