LCMXO2-4000HC-4TG144C Gator Programmabilis Porta Array 4320 LUTs 115 IO 3.3V 4 Spd
Product Description
| Productum attributum | Precium attributum |
| Fabrica: | cancellos |
| Product Category: | FPGA - Field Programmabiles portae Array |
| RoHS: | Singula |
| Series: | LCMXO2 |
| Numerus Elementorum Logicae: | 4320 LE |
| Numerus I / Os: | 114 I/O |
| Supple intentione - Min: | 2.375 V |
| Supple intentione - Max: | 3.6 V |
| Minimum Operating Temperature: | 0 C |
| Maximum Operating Temperature: | + 85 C |
| Data Rate: | - |
| Numerus Transceivers: | - |
| Adscendens Style: | SMD/SMT |
| Sarcina / Case: | TQFP-144 |
| Packaging: | Tray |
| Notam: | cancellos |
| RAM distribuit: | 34 kbit |
| Embedded Clausus RAM - EBR: | 92 kbit |
| Maximum Operating Frequency: | 269 MHz |
| Humor Sensitivus: | Ita |
| Numerus Logicae Forum obstruit - LABs: | 540 LAB |
| Supple Current operating: | 8.45 mA |
| Supple intentione operating: | 2.5 V/3.3 V |
| Product Type: | FPGA - Field Programmabiles portae Array |
| Factory Pack Quantity: | 60 |
| Subcategoria: | Programmabilis Logica ICs |
| Summa Memoria: | 222 kbit |
| Nomen: | MachXO2 |
| Unitas pondus: | 0.041530 oz |
1. Flexibile Architectura Logica
Sex strophas cum 256 ad 6864 LUT4s et 18 ad 334I/O*
2. ultra Minimum Power machinae
Provecta LXV nm humilis potentia processus
Ut humilis 22 μW standby power
Programmable humilis adductius differentialis I / O
Sta-per modum et alia potentia salutaris optiones
3. Embedded et Distributa Memoria
Ad 240 kbits sysMEM™ Embedded Clausus RAM
Ad LIV kbits Distributed RAM
Dedicated FIFO control logicae
4. De-Chip User Flash Memoria
Usque ad CCLVI kbits User Flash Memoria
100,000 scribe cycles
promptu per WISHBONE, SPI, I2C et JTAG .interfaces
potest adhiberi ut mollis processus PROM aut sicut Flashmemoria
5. Pre-Engineered Source SynchroniI/O*
DDR registris in I/O cellulis
Dedicated gearing logic
VII; Apparatus ad Display I / O
Generic DDR, DDRX2, DDRX4
Dedicavit DDR / DDR2 / LPDDR memoria cum DQSauxilium
6. Maximum euismod, flexibile I/O Buffer
Programmable sysi/o™ quiddam sustinet widerange of interfaces:
LVCMOS 3.3/2.5/1.8/1.5/1.2
LVTTL
PCI
LVDS, Bus-LVDS, MLVDS, RSDS, LVPECL
SSTL 25/18
HSTL 18
MIPI D-PHY Emulated
Schmitt felis initibus, usque ad 0.5 V hysteresis
EGO / O auxilium calidum socketing
De-chip terminationem differentialem
Programmable viverra-sursum vel viverra-descendit modus
7. Flexibile De Chip clocking
Octo prima horologiorum
Ad duo ora horologiorum summus celeritas I / Ointerfaces (ima parte tantum)
Ad duo Analog PLLs per machinam cum fractis-nfrequency synthesis
Wide initus frequency range (7 MHz ad 400MHz)
8. Non volatile, Infinite Reconfigurable
Instant-on - vires in microseconds
Single-chip, solutionis securae
Programmabile per JTAG, SPI vel I2C
background programmatio subsidia volatilis non-memoria
Libitum dual tabernus cum externa SPI memoria
9. TransFR™ Reconfigurationis
in agro ratione update dum ratio operatur
10. Consectetur Ratio Level Support
Munera obdurata de chip: SPI, I2C;timor / contra
De-chip oscillatoris cum 5.5% accuratione
Unique TraceID ad systema tracking
Unum tempus Programmable (OTP) modus
Una potentia copia cum extenso operatingrange
IEEE Standard 1149,1.
IEEE 1532 facilis ratio programmandi
11. plateae latioris range of Package Options
TQFP, WLCSP, ucBGA, csBGA, caBGA, ftBGA;fpBGA, QFN sarcina optiones
Parvus vestigium sarcina options
Tam parvus quam 2.5 mm x 2.5 mm
densitas migrationis suscepit
Provectus halogen libero packaging
