LCMXO640C-4TN144C FPGA - Field Programmabilis porta ordinata 640 LUTS 113 I/O
Product Description
| Productum attributum | Precium attributum |
| Fabrica: | cancellos |
| Product Category: | FPGA - Field Programmabiles portae Array |
| RoHS: | Singula |
| Series: | LCMXO640C |
| Numerus Elementorum Logicae: | 640 LE |
| Numerus I / Os: | 113 I/O |
| Supple intentione - Min: | 1.71 V |
| Supple intentione - Max: | 3.465 V |
| Minimum Operating Temperature: | 0 C |
| Maximum Operating Temperature: | + 85 C |
| Data Rate: | - |
| Numerus Transceivers: | - |
| Adscendens Style: | SMD/SMT |
| Sarcina / Causa: | TQFP-144 |
| Packaging: | Tray |
| Notam: | cancellos |
| RAM distribuit: | 6.1 kbit |
| Height: | 1.4 mm |
| Longitudo; | 20 mm |
| Maximum Operating Frequency: | 550 MHz |
| Humor Sensitivus: | Ita |
| Numerus Logicae Forum obstruit - LABs: | 80 LAB |
| Supple Current operating: | 17 mA |
| Supple intentione operating: | 1.8 V/2.5 V/3.3 V |
| Product Type: | FPGA - Field Programmabiles portae Array |
| Factory Pack Quantity: | 60 |
| Subcategoria: | Programmabilis Logica ICs |
| Summa Memoria: | 6.1 kbit |
| Latitudo: | 20 mm |
| Unitas pondus: | 1.319 g |
Non volatile, Infinite Reconfigurable
• instantes-on - in microseconds vires
• Singulum chip, nulla externa figuratio requiritur memoria
• Praeclarum consilium securitatis, nihil fluminis intercipiendi
• Reconfigure SRAM secundum rationem milliseconds
• SRAM et memoriae non volatilis programmabilis per JTAG portum
• subsidia background programmatio memoriae non-volatilis
Modus somnus
• permittit usque ad 100x elit current reductionem
TransFR™ Reconfigurationis (TFR)
• in-agro ratione update dum ratio operatur
Princeps I / O density ad logicam
• 256 ad 2280 LUT4s
• 73 ad 271 I/Os cum ampla sarcina optiones
• densitas transitus confirmavit
• ne libera / Manufacturer packaging
Embedded et Distributa Memoria
• Ad 27.6 Kbits sysMEM™ Embedded Clausus RAM
• Ad 7.7 Kbits distribui RAM
• Dedicated FIFO control logicae
Flexibile I/O Buffer
• Programmabile syIO™ quiddam sustinet amplis interfacium:
– LVCMOS 3.3/2.5/1.8/1.5/1.2
- LVTTL
- PCI
– LVDS, Bus-LVDS, LVPECL, RSDS
sysCLOCK™ PLLs
• Ad duo Analog PLLs per fabrica
• Horologium multiplica, divide, tempusque vagans
Ratio Level Support
• IEEE Standard 1149.1 Terminus Scan
• Onboard oscillator
• machinae cum 3.3V, 2.5V, 1.8V vel 1.2V potentiae copiae agunt
• IEEE 1532 ratio programmatis obsecundans
