TPS51200QDRCRQ1 Nova et originalis Power Management Specialioribus IC
Product Description
Productum attributum | Precium attributum |
Fabrica: | Texas Instrumenta |
Product Category: | Potestas Management Specialioribus - PMIC |
RoHS: | Singula |
Series: | TPS51200-Q1 |
Typus: | Automotive |
Adscendens Style: | SMD/SMT |
Sarcina / Case: | VSON-10 |
Output Current: | DC mA |
Minimum Operating Temperature: | - 40 C |
Maximum Operating Temperature: | + 125 C |
Quid: | AEC-Q100 |
Packaging: | Reel |
Packaging: | Cut Tape |
Packaging: | MouseReel |
Notam: | Texas Instrumenta |
Humor Sensitivus: | Ita |
Supple Current operating: | DCC uA |
Pd - Potentia dissipatio: | 0.79 W |
Product Type: | Potestas Management Specialioribus - PMIC |
Factory Pack Quantity: | 3000 |
Subcategoria: | PMIC - Power Management ICs |
Unitas pondus: | 0.00146 oz |
♠TPS51200-Q1 pessum et Source DDR Termination Regulator
Instrumentum TPS51200-Q1 est submersa et fons duplicis-datae (DDR) terminationis regulator designatus in intentione input humili, humilis sumptus, rationum strepitus humilis ubi spatium clavis consideratio est.Cogitatus TPS51200-Q1 responsionem caducam servat et tantum minimum postulat capacitatem 20 μF.Fabrica TPS51200-Q1 functionem sentientem remotam et omnem potentiam requisitam ad DDR, DDR2, DDR3, DDR3L, Low Potestas DDR3 et DDR4 VTT bus terminationibus sustinet.
Praeterea TPS51200-Q1 fabrica praebet signum apertum PGOOD-exhaurientem ad monitoris dispositionem et signum EN, quod VTT in S3 (suspendendi RAM) applicationes pro DDR adhiberi potest.
TPS51200-Q1 fabrica in sarcina scelerisque efficiente VSON-10 praesto est, et aestimatur
tam viridem, Pb-liberum.Cogitatus de -40°C ad 125°C specificatur.
• secundum quid pro Automotive Applications
• AEC-Q100 Testi Ducatus Cum Sequentibus Proventus:
- Fabrica Temperature Gradus 1: -40° C ad 125° F Ambiens Operating Temperature
- Fabrica HBM ESD Ordo Level 2
- Fabrica CDM ESD Ordo Level C4B
• Input intentione: subsidia 2.5-V Rail et 3.3-V Rail
• VLDOIN Voltage Range: 1.1 V ad 3.5 V
• pessum / Source Termination Regulator Series Iacta Compensation
• Minimum Output capacitatem 20-μF requirit (typice 3 10-μF MLCCs) pro Memoria Terminatione Applications (DDR)
• PGOOD ad Monitor output ordinatione
• EN Input
• REFIN potenti Permittit enim flexibilia input mauris vel directe vel per Resistor dividens
• Longinquus (VOSNS)
• ± 10-mA Buffered Reference (REFOUT)
• inaedificata in Mollis Start, UVLO et OCL
• scelerisque Shutdown
• Meets DDR, DDR2 JEDEC Specifications;Sustinet DDR3, DDR3L, Low-Power DDR3 et DDR4 VTT Applications
• VSON-X Package Cum Eris Scelerisque metus
• Memoria Terminatio Regulator pro DDR, DDR2, DDR3, DDR3L, Low Power DDR3 et DDR4
• Codicillus, Desktop, Server
• Telecom et Datacom, GSM Base Statio, LCDTV et PDP-TV, Scriba et Typographus, Pone-Top Box