P1020NXN2HFB Microprocessores - MPU 800/400/667 ET NE r1.1
Product Description
| Productum attributum | Precium attributum |
| Fabrica: | NXP |
| Product Category: | Microprocessors - MPU |
| RoHS: | Singula |
| Adscendens Style: | SMD/SMT |
| Sarcina / Causa: | TEPBGA-689 |
| Series: | P1020 |
| Core: | e500 |
| Numerus Cores: | 2 Core |
| Data Bus Latitudo: | 32 bit |
| Maximum Horologium Frequency: | 800 MHz |
| L1 Cache Instructio Memoria: | 2 x 32 kB |
| L1 Cache Data Memoria: | 2 x 32 kB |
| Supple intentione operating: | 1 V |
| Minimum Operating Temperature: | - 40 C |
| Maximum Operating Temperature: | + 125 C |
| Packaging: | Tray |
| Notam: | NXP Semiconductors |
| I/O intentione: | 1.5 V, 1.8 V, 2.5 V, 3.3 V |
| Instructio Type: | Fluctuans Point |
| Interface Type: | Aer, I2C, Plu, SPI, UART, USB . |
| L2 Cache Instructio / Data Memoria: | 256 kB |
| Memoria Type: | L1/L2 Cache |
| Humor Sensitivus: | Ita |
| Numerus I / Os: | 16 I/O |
| Processus Series: | QorIQ |
| Product Type: | Microprocessors - MPU |
| Factory Pack Quantity: | 27 |
| Subcategoria: | Microprocessors - MPU |
| Nomen: | QorIQ |
| Watchdog Timers: | Non Watchdog Vicis |
| Pars # Aliases: | 935310441557 |
| Unitas pondus: | 5.247 g |
• Dual summus perficientur 32-bit coros, in potentia technologiae Architecturae® constructa:
- XXXVI-bit corporalis addressing
- Duplex subtilitas fluctuetur-punctum firmamentum
- 32 cache et 32 Kbyte L1 data cache pro quolibet core
- 533 MHz ad 800 MHz horologium frequentiae
• 256 Kbyte L2 cache cum ECC.Item configurable ut SRAM et stativa memoria.
• Tres 10/100/1000 Mbps auctum trium celeritatis moderatoris Aer (eTSECs)
- TCP/IP acceleratio, qualitas muneris, divisio facultatum
- IEEE® 1588 support
- Lossless imperium fluunt
- MII, RMII, RGMII, SGMII
• Summus celeritas interfaces varias multiplices optiones sustentans:
- Quattuor SerDes usque ad 2.5 GHz/lane multiplexed per moderatoris
- Duo PCI interfaces
- Duo SGMII interfaces
• summus Volo USB moderatoris (USB 2.0)
- Hostiam et auxilium fabrica
- Consectetur hospes interface moderatoris (EHCI)
- ULPI interface ad PHY
• Consectetur secure digital exercitum moderatoris (SD / MMC)
• Consectetur Serial interface periphericis (eSPI)
• Integrated securitatem engine
- Protocollum subsidium includit ARC4, 3DES, AES, RSA/ECC, RNG, unum passum SSL/TLS
- XOR accelerationis
• 32-bit DDR2/DDR3 SDRAM memoria moderatoris cum ECC support
• Programmabilis interpellandi moderatoris (PIC) obsecundantia OpenPIC vexillum
• unus quattuor alveo DMA controller
• Duo I2 C moderatores, DUART, timers
• consectetur moderatoris loci bus (eLBC)
• TDM
• 16 generalis-proposito I/o annuit
• Coniunctio operans temperatus (Tj ) range: 0-125°C et -40°C ad 125°C (specificatio industrialis)
• 31 31 mm 689 WB-TePBGA II (filum vinculum temperatus auctus plasticus BGA)
