PIC18F45K40-I/PT 8bit Microcontrollers MCU 32KB Flash 2KB RAM 256B EEPROM 10bit ADC2 5bit DAC
Product Description
| Productum attributum | Precium attributum |
| Fabrica: | Microchip |
| Product Category: | 8-bit Microcontrollers - MCU |
| RoHS: | Singula |
| Series: | PIC18(L)F4xK40 |
| Adscendens Style: | SMD/SMT |
| Sarcina / Case: | TQFP-44 |
| Core: | PIC18 |
| Programma Memoria Location: | 32 kB |
| Data Bus Latitudo: | 8 bit |
| ADC Consilium: | 10 bit |
| Maximum Horologium Frequency: | 64 MHz |
| Numerus I / Os: | 36 I/O |
| Data Ram Size: | 2 kB |
| Supple intentione - Min: | 2.3 V |
| Supple intentione - Max: | 5.5 V |
| Minimum Operating Temperature: | - 40 C |
| Maximum Operating Temperature: | + 85 C |
| Quid: | AEC-Q100 |
| Packaging: | Tray |
| Notam: | Microchip Technology / Atmel |
| DAC Resolutio: | 5 bit |
| Data RAM Type: | SRAM |
| Data ROM Size: | 256 B |
| Data ROM Type: | EEPROM |
| Interface Type: | I2C, EUSART, SPI |
| Humor Sensitivus: | Ita |
| Numerus ADC canales: | 35 Channel |
| Numerus Timers / Calculis: | 4 Timer |
| Processus Series: | PIC18F2xK40 |
| Productum: | MCU |
| Product Type: | 8-bit Microcontrollers - MCU |
| Programma Memoria Type: | Flash |
| Factory Pack Quantity: | 160 |
| Subcategoria: | Microcontrollers - MCU |
| Nomen: | PIC |
| Watchdog Timers: | Watchdog Timer |
| Unitas pondus: | 0.00705 oz |
♠ 28/40/44-pin, Low-Power, High-Perficiendi Microcontrollers cum XLP Technology
Hae PIC18 (L)F26/45/46K40 microcontrolers notant Analog, Core Peripherales independentes et Peripherales Communicationis, coniuncti cum extrema Potestate Belgico (XLP) technologia pro amplis applicationibus communium et humilium potentiarum.Hae machinae 28/40/44 -pinum instructae sunt cum 10-bit ADC cum Computatione (ADCC) automandi Capacitivae intentionis dividentis (CVD) artificiosam tactum sentiendi, averingendi, eliquandi, transmittendi et faciendi limen automatice comparationum.Etiam statutum Core Periphericis Independentis praebent ut Generator Waveform complementarius (CWG), Windowed Watchdog Timer (WWDT), Cyclica Redundantia Perscriptio (CRC)/Memoria Scan, Zero-Crux Detect (ZCD) et Pin Lego Periphericum (PPS); consilio augendo flexibilitatem et inferiorem systematis pretium providens.
• C Compiler Optimised RISC Architecture
• operating velocitate
– DC - 64 MHz horologium initus super plenam VDD range
- 62.5 ns minimum instructionis cycli
• Programmable II-Level Interrumpere prioritatem
• 31-Level Deep Hardware Stack
• Tres VIII-bit Timers (TMR2/4/6) cum Hardware Limit Vicis (HLT)
• Quattuor XVI-bit Timers (TMR0/1/3/5)
• Low-Current Power-de Reddere (POR)
• Power-sursum Vicis (PWRT)
• Brown-e Reset (BOR)
• Low-Power BOR (LPBOR) Option
• Windowed Watchdog Timer (WWDT);
- Watchdog Reset in nimium longum vel brevior intervallum inter vigilans patet eventus
- Variabilis prescaler lectio
- Variabilis fenestra magnitudinis lectio
- Omnes fontes configurable in hardware vel software
