S9KEAZ128AMLH ARM Microcontrolers – MCU Kinetis E 32 frenum MCU, ARM Cortex-M4 core, 128KB Flash, 48MHz, QFP 64
Product Description
Productum attributum | Precium attributum |
Fabrica: | NXP |
Product Category: | ARM Microcontrollers - MCU |
RoHS: | Singula |
Series: | KEA128 |
Adscendens Style: | SMD/SMT |
Sarcina / Case: | LQFP-64 |
Core: | ARM Cortex M0+ |
Programma Memoria Location: | 128 kB |
Data Bus Latitudo: | 32 bit |
ADC Consilium: | 12 bit |
Maximum Horologium Frequency: | 48 MHz |
Numerus I / Os: | 71 I/O |
Data Ram Size: | 16 kB |
Supple intentione - Min: | 2.7 V |
Supple intentione - Max: | 5.5 V |
Minimum Operating Temperature: | - 40 C |
Maximum Operating Temperature: | + 125 C |
Quid: | AEC-Q100 |
Packaging: | Tray |
Notam: | NXP Semiconductors |
DAC Resolutio: | 6 bit |
Data RAM Type: | aries |
Interface Type: | I2C, SPI, UART . |
Humor Sensitivus: | Ita |
Numerus Timers / Calculis: | 6 Timer |
Processus Series: | KEA128 |
Productum: | MCU |
Product Type: | ARM Microcontrollers - MCU |
Programma Memoria Type: | Flash |
Factory Pack Quantity: | 800 |
Subcategoria: | Microcontrollers - MCU |
Watchdog Timers: | Watchdog Timer |
Pars # Aliases: | 935325897557 |
Unitas pondus: | 0.012224 oz |
• Operating characteres
- Voltage range: 2.7 ad 5.5 V
- Flash scribe voltage range: 2.7 ad 5.5 V
- Temperature range (ambiens): -40 ad 125°C
• euismod
– Sursum ad 48 MHz Arm® Cortex-M0+ core
- Singulus orbis 32-bit x 32-bit multiplicator
- Una exolvuntur I / O portum aditus
• Memoriae et memoriae interfaces '
- Ad CXXVIII MB mico
- Ad XVI KB RAM
• Horologiorum
- Oscillator (OSC) - subsidia 32.768 kHz crystallum vel 4 MHz ad 24 MHz resonator crystallus vel ceramicus;optio humilis potentia vel altum quaestum oscillatores
- Fons horologii interni (ICS) - internus FLL cum relatione interna vel externa, 37.5 kHz pre-tonsura interna referentia pro 48 MHz horologii systematis.
- Internum 1 kHz humilis potentia oscillator (LPO)
• Ratio peripherales
- Moduli administrandi potestas (PMC) cum tribus modis potentiae: Curre, Mane, Siste
- Low-voltage deprehendatur (LVD) cum reset vel adjicias, selectable iter puncta
- Watchdog cum independens horologium fontem (WDOG)
- Programmable cyclica redundantia reprehendo moduli (CRC)
- Vide filum debug interface (SWD)
- Aliased SRAM bitband regionem (bit-band)
- Bit manipulation engine (BME)
• Securitatis et integritatis modulorum
- 80-bit unique identificatio (ID) numerus per chip • machina humana interface
- Ad LVII generalis propositi initus / output (GPIO)
- Ad XXXVII generalis proposito initus / output (GPIO)
- Usque ad initus generalis XXII-proposito / output (GPIO)
- Ad XIV generalis, ad initus / output (GPIO)
- Ad LXXI generalis-proposito initus / output (GPIO)
- Duo XXXII frenum tincidunt adjicias modules (KBI)
- Adjicias externi (IRQ)
• analogon modulorum
- Unum usque ad 16-alveum 12-bit SAR ADC, operandi in Sistere modum, hardware ad libitum felis (ADC)
- Duo analogon comparatores continens 6 frenum DAC et programmabile input (ACMP)
• Timers
- One 6-fluvium FlexTimer/PWM (FTM)
- Duo 2-fluvium FlexTimer/PWM (FTM)
- II-alveum unum timer periodicum adjicias (PIT)
- Unus timor pulsus width (PWT)
- Unum real-time horologium (RTC)
• Communication interfaces
- Duo moduli SPI (SPI)
- Ad tria UART modules (UART)
- Duo moduli I2C (I2C)
- Modulus unus MSCAN (MSCAN)
• Package optiones
- 80-pin LQFP
- 64-pin LQFP