SPC5675KFF0MMS2 32bit Microcontrollers MCU 2MFlash 512KSRAM EBI
Product Description
| Productum attributum | Precium attributum |
| Fabrica: | NXP |
| Product Category: | 32-bit Microcontrollers - MCU |
| RoHS: | Singula |
| Series: | MPC5675K |
| Adscendens Style: | SMD/SMT |
| Sarcina / Case: | BGA-473 |
| Core: | e200z7d |
| Programma Memoria Location: | 2 MB |
| Data Ram Size: | 512 kB |
| Data Bus Latitudo: | 32 bit |
| ADC Consilium: | 12 bit |
| Maximum Horologium Frequency: | 180 MHz |
| Supple intentione - Min: | 1.8 V |
| Supple intentione - Max: | 3.3 V |
| Minimum Operating Temperature: | - 40 C |
| Maximum Operating Temperature: | + 125 C |
| Quid: | AEC-Q100 |
| Packaging: | Tray |
| Analoga Supple Voltage: | 3.3 V/5 V |
| Notam: | NXP Semiconductors |
| Data RAM Type: | SRAM |
| I/O intentione: | 3.3 V |
| Humor Sensitivus: | Ita |
| Processus Series: | MPC567xK |
| Productum: | MCU |
| Product Type: | 32-bit Microcontrollers - MCU |
| Programma Memoria Type: | Flash |
| Factory Pack Quantity: | 420 |
| Subcategoria: | Microcontrollers - MCU |
| Watchdog Timers: | Watchdog Timer |
| Pars # Aliases: | 935310927557 |
| Unitas pondus: | 0.09385 oz |
MPC5675K Microcontroller
MPC5675K microcontroller, solutio securitatis est aXXXII frenum embedded moderatoris disposito provectae exactorissubsidia systemata cum RADAR, CMOS imaginatione, LIDARet sensoriis ultrasonicis et motricium 3-phase multiplex imperiumapplications as in hybrid electrica vehicles (HEV) inautocinetum et caliditas applicationes industriae.
Sodalis NXP familiae semiconductoris MPC5500/5600,Continet Librum E obsequentem Power Architecturecore technology cum Variabili Longitudine Encoding (VLE).Hoccore prosequitur Power Architecture embeddedcategoria, et est 100 percent modus usoris compatibilis cumoriginal Power PC™ instruction set architectura (UISA).Ratio perficiendi offert quadruplum suumMPC5561 Decessor Noster, dum tibi firmitatem acfamiliaritas probatae Potestatis Architecturae technologiae.
Comprehensive suite hardware et softwareevolutionis instrumenta praesto est auxilium simpliciorem ac velocitatemratio consiliorum.Progressio subsidium est available educens instrumenta concionatorum praebens compilatores, debuggers etsimulatio progressus ambitus.
• Summus perficientur e200z7d dual core
- 32 frenum Power Architecture technologia CPU
- Ad CLXXX MHz core frequency
- Dual-exitus core
- Variabilis longitudo modum translitterandi (VLE)
- Memoria procuratio unitatis (MMU) cum 64 entries
- 16 KB instructiones cache et 16 KB data cache
• Memoria praesto
- Ad II MB code mico memoria cum ECC
- 64 KB data mico memoria cum ECC
- Ad DXII KB in-chip SRAM cum ECC
• SIL3/ASILD conceptus securitatis amet porttitor: LockStep modus et tutelae tutae deficient
- Sphaera replicationis (Sor) pro clavibus componentibus
- Redundancy reprehendo unitates in outputs de SoR at vel FCCU
- Culpa collectio et unitas (FCCU)
- Boot-tempus constructum-in sui tium memoriae (MBIST) et logicae (LBIST) hardware Urguet
- Boot-tempus constructum-in auto-tium ADC et mico memoria
- Replicated salus, consectetur vigil timer
- Silicon substratum (die) temperatus sensorem
- Non maskable adjicias (NMI)
- 16-regionis memoria unitatis praesidium (MPU)
- Pro magna signa (CMU)
- administratio unitatis (PMU)
- Cyclic redundantia reprehendo (CRC) unitates
• Decoupled Psalter modus est summus perficientur usu replicatur metretas
• Nexus Classis 3+ interface
• obloquitur
- Replicated XVI, prior adjicias controller
• GPIOs singulariter programmabiles ut initus, output, vel munus speciale
• III generalis, ad eTimer unitates (canales inter se VI)
• III FlexPWM unitates cum quattuor XVI frenum canales per moduli
• Communications interfaces
- 4 LINFlex modules
- 3 DSPI modulorum latis chip electa generation
- 4 FlexCAN interfaces (2.0B Active) cum 32 nuntius obiecti
- FlexRay moduli (V2.1) cum alveo duali, usque ad 128 nuntius rerum et usque ad 10 Mbit/s
- Fast Aer Controller (FEC)
- 3 I2C modules
• quattuor XII frenum analog-ad-digital converters (ADCs)
- 22 input channels
- Programmabilis crux excitato unitatis (CTU) synchronize ADC conversionem cum timer et PWM
• bus externi interface
• 16-bit externum DDR memoriae moderatoris
• Psalterium digitalis interface (PDI)
• De-chip Can / UART bootstrap oneratus
• Capax operandi in uno 3.3 V voltage copia
- 3.3 V-modo moduli: I/O, oscillatores, memoria mico
— 3.3 V vel V modulorum V: ADCs, supple VREG internis
- 1.8-3.3 V copia range: DRAM/PDI
• operans coniunctas temperatus range -40 ad CL ° C
