STM8S005K6T6C 8 frenum Microcontrollers - MCU 8-bit MCU Pendo Linea 16 MHz 32kb Flash

Description:

Manufacturers: STMicroelectronics
Product Category: Microcontrollers 8-bit - MCU
Data Sheet:STM8S005K6T6C
Description: Microcontrollers - MCU
RoHS status: RoHS Compliant


Product Detail

Features

Product Tags

Product Description

Productum attributum Precium attributum
Fabrica: STMicroelectronics
Product Category: 8-bit Microcontrollers - MCU
RoHS: Singula
Series: STM8S005K6
Adscendens Style: SMD/SMT
Sarcina / Case: LQFP-32
Core: STM8
Programma Memoria Location: 32 kB
Data Bus Latitudo: 8 bit
ADC Consilium: 10 bit
Maximum Horologium Frequency: 16 MHz
Numerus I / Os: 25 I/O
Data Ram Size: 2 kB
Supple intentione - Min: 2.95 V
Supple intentione - Max: 5.5 V
Minimum Operating Temperature: - 40 C
Maximum Operating Temperature: + 85 C
Packaging: Tray
Notam: STMicroelectronics
Data ROM Size: 128 B
Data ROM Type: EEPROM
Interface Type: I2C, SPI, UART .
Humor Sensitivus: Ita
Numerus ADC canales: 7 Channel
Numerus Timers / Calculis: 3 Timer
Processus Series: STM8S005
Product Type: 8-bit Microcontrollers - MCU
Programma Memoria Type: Flash
Factory Pack Quantity: 1500
Subcategoria: Microcontrollers - MCU
Unitas pondus: 0.03819 oz

 

Pendo linea, 16 MHz STM8S 8-bit MCU, 32-Kbyte memoria Flash, data EEPROM, 10 frenum ADC, timers, UART, SPI, I²C

STM8S005C6/K6 valorem rectae 8-bit microcontrolers offerunt 32 Kbytes de Mico programmatis memoria, plus 128 bytes notitiarum EEPROM.Referuntur ad machinas mediae densitatis in STM8S microcontroller familias manuales referentes (RM0016).

Omnes cogitationes STM8S005C6/K6 valoris rectae sequentes utilitates praebent: opera, robur, ratio sumptus et cursus evolutionis breves reductae.

Fabrica persecutionis et roboris in tuto collocantur verae notitiae EEPROM adiuvantes usque ad 100000 cyclos scribe/erasas, nuclei et peripherales provectos in technologia artis artis facta in 16 MHz horologii frequentiae, robusti I/Os, canes independentes cum horologio separato principium, et horologii securitatis ratio.

Sumptus systematis reducitur propter altitudinem systematis integrationis gradus cum horologii interni oscillatoribus, vigilibus, et reseto brunneo.

Communes familiae architecturae producti cum pinout compatible, tabula memoria et periphericis modularibus applicationem scalabilitatis et cycli progressionis reduci permittunt.

Producta omnia operantur ex intentione 2.95 V ad 5.5 V copia.

Plena documenta praebetur necnon ampla instrumenta evolutionis electio.


  • Previous:
  • Deinde:

  • Core

    • Max fCPU: 16 MHz

    • Provectus STM8 core cum architectura Harvardiana et 3 scaena pipeline

    • Fundo disciplinam set

    Memoriae

    • Medium-density Flash/EEPROM

    - Programma memoria: 32 Kbytes de Flash memoriae;data retentione XX annorum in LV °C post 100 circuitus

    - Data memoria: 128 bytes data vera EEPROM;tolerare ad C k scribe / vim extermina

    • RAM: 2 Kbytes

    Horologium, reset ac praebeat procuratio

    • 2.95 V ad 5.5 intentione operante

    • Horologium flexibile imperium, 4 magisterii horologii fontes

    - Low-virtus crystallum resonator oscillator

    - Horologium externum initus

    - Internus, usor-tormabilis 16 MHz RC

    - Interna vis humilis 128 kHz RC

    • Horologium securitatis ratio cum horologium monitorem

    • Potestas procuratio

    - Low-power modos (expecta, activa, claude, claude)

    - SWITCH-off periphericis horologiorum singulos

    - Permanenter activae, humilis-consummatio potentiae in quod potentia descendit reset

    Interpellare procuratio

    • Nested adjicias moderatoris cum XXXII obloquitur

    • Ad XXXVII extra obloquitur in VI vector

    Timers

    • 2x 16-bit generalis propositi timers, cum canalibus 2+3 CAPCOM (IC, OC vel PWM)

    • Provecta moderatio timoris: 16 frenum, 4 capcom canales, 3 outputationes complementarias, insertio temporis mortui et synchronisation flexibilis

    • VIII-bit basic timor ad VIII-bit prescaler

    • Auto excitare timer

    • Fenestra ac sui iuris vigilem timers

    Communications interfaces

    • UART cum horologii output pro operatione synchrona, SmartCard, IrDA, LIN

    • SPI interface ad Mbit VIII / s *

    • I 2C interface ad 400 Kbit/s

    Analoga ad digital converter (ADC)

    • 10-bit ADC, ± 1 LSB ADC cum canalibus multiplicatis usque ad 10, modum scan ac speculatorem analogum.

    I/Os

    • Ad XXXVIII I / Os in XLVIII-pin sarcina comprehendo XVI summus submersa outputs

    • Valde robustum I/O consilium, contra venam injectionem immunem

    Progressio subsidium

    • embedded una-filum interface moduli (NATO) pro celeriter on-chip programmatio et non MOLESTUS debugging

     

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