TPS51604DSGR Gate Coegi Sync Buck FET Dvr
Product Description
Productum attributum | Precium attributum |
Fabrica: | Texas Instrumenta |
Product Category: | Porta Coegi |
RoHS: | Singula |
Productum: | Medium pontem Coegi |
Typus: | Summus Latus, Low-Lide |
Adscendens Style: | SMD/SMT |
Sarcina / Case: | WSON-8 |
Numerus Coegi: | II Coegi |
Numerus outputs: | 2 Output |
Output Current: | 4 A |
Supple intentione - Min: | 4.5 V |
Supple intentione - Max: | 5.5 V |
Tempus surge: | 15 ns |
Fall tempus: | 10 ns |
Minimum Operating Temperature: | - 40 C |
Maximum Operating Temperature: | + 105 C |
Series: | TPS51604 |
Packaging: | Reel |
Packaging: | Cut Tape |
Packaging: | MouseReel |
Notam: | Texas Instrumenta |
Features: | Mortuus Tempus Imperium, Synchroni Rectificatio |
Humor Sensitivus: | Ita |
Supple Current operating: | DC uA* |
Supple intentione operating: | 4.5 V ad 28 V |
Output intentione: | 34 V |
Product Type: | Porta Coegi |
Factory Pack Quantity: | 3000 |
Subcategoria: | PMIC - Power Management ICs |
Technologia: | Si |
Unitas pondus: | 0.00094 oz |
♠ TPS51604 Synchroni Buck FET Coegi ad Summus Frequency CPU Core Power
Agitatores TPS51604 optimized sunt pro applicationes alta frequentia CPU VCORE.Provectae lineamenta quae ad mortem temporis coegi redactae et auto- zeae transitus adhibentur ad efficientiam optimize per totum onus range.
SKIP paxillus optionem CCM operationis praebet ad administrationem e output voltage continentem supportandam.Praeterea TPS51604 duos modos potentiae humilis sustinet.Cum initus in tri-state PWM, current quiescens ad 130 µA reducitur, cum responsione statim.Cum SKIP in tri-state tenetur, praesens ad 8 µA redigitur (typice 20 µs repetendi commutationes requiritur).Cum paribus congruis TI moderatoris, regentibus traderent rationem virtutis eximiae eximiae copiae perficiendi.
TPS51604 fabrica in spatio salutaris, thermally aucto 8-pin, 2-mm x 2-mm WSON sarcina et operatur ab -40°C ad 105°C.
• Reducitur Dead-time Drive Circuit for Optimized CCM
• Lorem Nulla Transgressus Deprehensio ad Optimized DCM Efficiency
• Multiple Low-Modos pro Optimised lucis Lond Efficens
• Optimised signum Path moras pro High-Frequency Operatione
• Integrated BST Switch Coegi Strength Optimized for Ultrabook FETs
• Optimized pro V-V FET Drive
• Conversio Input Voltage Range (VIN): 4.5 ad 28 V
• 2-mm 2-mm, 8-pin, WSON Thermal Pad Package
• Tabulettae Using High-Frequency eros Cum Post Power potenti:
- nibh
- Pugna
- NVDC
- 5-V vel 12-V Rails