LCMXO2280C-4TN144C FPGA – Series Portarum Programmabile in Campo 2280 LUTs 113 IO 1.8 /2.5/3.3V -4 Spd
♠ Descriptio Producti
Attributum Producti | Valor Attributi |
Fabricator: | Clathrus |
Categoria Producti: | FPGA - Series Portarum Programmabiles in Campo |
RoHS: | Detalia |
Series: | LCMXO2280C |
Numerus Elementorum Logicorum: | 2280 LE |
Numerus I/O: | 113 I/O |
Tensio Alimentaria - Minimum: | 1.71 V |
Tensio Alimentaria - Maxima: | 3.465 V |
Temperatura Operativa Minima: | 0°C |
Temperatura Maxima Operativa: | +85°C |
Frequentia Datorum: | - |
Numerus Transceptorum: | - |
Modus Montandi: | SMD/SMT |
Sarcina/Capsa: | TQFP-144 |
Involucrum: | Ferculum |
Marca: | Clathrus |
Memoria RAM distributa: | 7.7 kbit |
Memoria RAM Integrata - EBR: | 27.6 kbit |
Altitudo: | 1.4 mm |
Longitudo: | XX mm |
Frequentia Operativa Maxima: | 550 MHz |
Humoribus Sensibilis: | Ita |
Numerus Sectorum Ordines Logici - LAB: | 285 LABORATORIUM |
Cursus Operandi Subministrationis: | 23 mA |
Tensio Alimentationis Operativae: | 1.8 V/2.5 V/3.3 V |
Typus Producti: | FPGA - Series Portarum Programmabiles in Campo |
Quantitas Sarcinae Fabricae: | 60 |
Subcategoria: | Circuiti Integrati Logicae Programmabiles |
Memoria Totalis: | 35.3 kbit |
Latitudo: | XX mm |
Pondus Unitarium: | 1.319 grammata |
Non volatilis, infinite reconfigurabilis
• Instantanea accensa – intra microsecunda vim accendit
• Microprocessus singularis, nulla memoria configurationis externa requiritur
• Securitas designationis optima, nullus fluxus bit intercipiendus
• Logicam in SRAM fundatam intra millisecunda reconfigura.
• SRAM et memoria non volatilis per portum JTAG programmabiles
• Programmationem in scaena memoriae non volatilis sustinet
Modus Somni
• Usque ad 100x reductionem currentis statici permittit
Reconfiguratio TransFR™ (TFR)
• Renovatio logicae in agro dum systema operatur
Alta I/O ad Densitatem Logicam
• 256 ad 2280 LUT4s
• 73 ad 271 I/O cum amplissimis optionibus fasciculorum
• Migratio densitatis sustinetur
• Involucrum sine plumbo/RoHS congruens
Memoria Incorporata et Distributa
• Usque ad 27.6 Kbits memoria RAM inclusa sysMEM™
• Usque ad 7.7 Kbits memoria RAM distributa
• Logica moderationis FIFO dedicata
Buffer I/O Flexibilis
• Memoria programmabilis sysIO™ amplam varietatem interfacierum sustinet:
– LVCMOS 3.3/2.5/1.8/1.5/1.2
– LVTTL
– PCI
– LVDS, LVDS-bus, LVPECL, RSDS
sysCLOCK™ PLLs
• Usque ad duo PLL analoga per instrumentum
• Multiplicatio, divisio, et mutatio phasis horologii
Auxilium Gradus Systematis
• IEEE Standard 1149.1 Limitis Exploratio
• Oscillator in navi
• Instrumenta cum fonte potentiae 3.3V, 2.5V, 1.8V vel 1.2V operantur.
• Programmatio intra systema cum norma IEEE 1532 congruens