STM32F205ZGT6 ARM Microcontrollers - MCU 32BIT ARM Cortex M3 Connectivity 1024kB

Description:

Manufacturers: STMicroelectronics
Product Category: ARM Microcontrollers - MCU
Data Sheet:STM32F205ZGT6
Description: IC MCU 32BIT 1MB FLASH 144LQFP
RoHS status: RoHS Compliant


Product Detail

Features

Product Tags

Product Description

Productum attributum Precium attributum
Fabrica: STMicroelectronics
Product Category: ARM Microcontrollers - MCU
RoHS: Singula
Series: STM32F205ZG
Adscendens Style: SMD/SMT
Sarcina / Causa: LQFP-144
Core: ARM Cortex M3
Programma Memoria Location: 1 MB
Data Bus Latitudo: 32 bit
ADC Consilium: 12 bit
Maximum Horologium Frequency: 120 MHz
Numerus I / Os: 114 I/O
Data Ram Size: 128 kB
Supple intentione - Min: 1.8 V
Supple intentione - Max: 3.6 V
Minimum Operating Temperature: - 40 C
Maximum Operating Temperature: + 85 C
Packaging: Tray
Notam: STMicroelectronics
Data RAM Type: SRAM
Data ROM Size: 512 B
Interface Type: 2xCAN, 2xUART, 3xI2C, 3xSPI, 4xUSART, SDIO
Humor Sensitivus: Ita
Numerus Timers / Calculis: 10 Timer
Processus Series: ARM Cortex M
Product Type: ARM Microcontrollers - MCU
Programma Memoria Type: Flash
Factory Pack Quantity: 360
Subcategoria: Microcontrollers - MCU
Nomen: STM32
Unitas pondus: 1.290 g

 

 

♠ Arm® dicentur 32 frenum MCU, 150 DMIPs, usque ad 1 MB Flash/128+4KB RAM, USB OTG HS/FS, Aer, 17 TIMs, 3 ADCs, 15 comm.interfaces et camera

Familia STM32F20x in summo perficientur in Arm® Cortex®-M3 32-bit nucleo RISC operante innititur frequentia usque ad 120 MHz.Familia memorias infixas incorporat (Flash memoriae usque ad 1 Mbyte, usque ad 128 Kbytes systematis SRAM), usque ad 4 Kbytes de tergum SRAM, et ampla ampliatio I/Os et peripheralium duobus APB busibus connexis; tres AHB buses et 32 ​​bis multi- bus matricis AHB.

Cogitationes etiam inducunt acceleratorem memoriae realitatis adaptivam (ART Accelerator), qui permittit ut perficiendi aequivalens 0 exspectationem status programmatis exsecutionis a Flash memoriae apud CPU frequentiam usque ad 120 MHz.Haec effectus convalescit utens Probatio CoreMark®.

Omnes cogitationes tres 12-bit ADCs, duo DACs, humili potentia RTC, duodecim propositi generalis 16-bit timers inclusa duo PWM timers pro potestate motoria, duo consilii generalis 32-bit timentes.verus numerus temere generans (RNG).Ipsi etiam vexillum interfaciunt ac communicationis progressum interfaciunt.Nova peripheralia provecta includunt SDIO, flexibile memoriae static auctum imperium (FSMC) interfaciem (pro artificiis in fasciculis 100 fibularum et plurium oblatis), et cameram interfaciem pro CMOS sensoriis.Cogitationes etiam in pluma vexillum peripherales sunt.

 


  • Previous:
  • Deinde:

  • • Core: Arm® 32-bit Cortex®-M3 CPU (120 max MHz) cum Adaptivo reali temporis acceleratore (ART Accelerator™) permittens 0-expectare exsecutionem status executionis a Flash memoriae, MPU, 150 DMIPS/1.25 DMIPS/MHz ( Dhrystone 2.1)

    • Memoriae

    - Ad I Mbyte de Flash memoria

    - 512 bytes of OTP memory

    – Ad 128 + 4 Kbytes de SRAM

    - Flexibilis memoria stabilis moderatoris qui Foedus Flash, SRAM, PSRAM, NOR et NAND memoriam sustinet

    - LCD parallelus instrumenti, 8080/6800 modo

    • Horologium, reset ac copia administratione

    – Ab 1.8 ad 3.6 V suppletionem applicationis + I/Os - POR, PDR, PVD et BOR .

    – 4 ad 26 MHz crystallus oscillator

    - Internus 16 MHz officinas-ornata RC

    - 32 kHz oscillator pro RTC cum calibratione

    - Internum 32 kHz RC cum calibration

    • modus potentiae inferioris

    - Somnus, Siste et sto modos

    - VBAT supple pro RTC, 20 32 libelli tergum registri, et ad libitum 4 Kbytes tergum SRAM

    • 3 12-bit, 0.5 µs ADCs cum usque ad 24 canales et usque ad 6 MSPS in triplici modo interpositi

    • 2 12-bit D/A converters  generalis ad DMA: 16-amnis moderatoris cum FIFOs centralised et subsidium rupit.

    • Ad XVII timers

    – Usque ad duodecim 16 frenum et duo 32-bit timers, usque ad 120 MHz, unaquaeque cum usque ad quattuor IC/OC/PWM vel pulsus calculo et quadratura (incrementalis) encoder initus

    • Debug modus: Serial filum debug (SWD), JTAG, et Cortex®-M3 Embedded Trace Macrocell™.

    • Ad 140 I / O portus facultatem interpellandi:

    - Ad CXXXVI ieiunium I / os usque ad LX MHz

    - Usque ad 138 V V-patiens I/Os

    • Ad XV communicationis interfaces

    - Ad tria interfaces I2C (SMBus / PMBus)

    – Usque ad quattuor USARTs et duos UARTs (7.5 Mbit/s, ISO 7816 interfacies, LIN, IrDA, modem imperium)

    - Usque ad tres SPis (30 Mbit/s), duo cum muxed I2S ut consequi genus accurationis audio per audio PLL vel externum PLL.

    – 2 interfacet (2.0B Active)

    - SDIO interface

    • Advanced connectivity

    - USB 2.0 plena celeritate fabrica / exercitum / OTG controller cum in-chip PHY

    - USB 2.0 summus celeritas / plena celeritate fabrica / exercitum / OTG moderatoris cum dicata DMA, chip plena celeritate PHY et ULPI

    – 10/100 Ethernet MAC cum dedicatis DMA: subsidiis IEEE 1588v2 ferramentis, MII/RMII

    • 8- ad 14-bit camera parallela interface (48 Mbyte/s max.)

    • CRC unitas calculum

    • 96-bit unique ID

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