STM32H723ZET6 ARM Microcontrollers – MCU summus perficientur & DSP DP-FPU, Arm Cortex-M7 MCU 512 Kbytes Flash, 564 Kbytes RA
Product Description
| Productum attributum | Precium attributum |
| Fabrica: | STMicroelectronics |
| Product Category: | ARM Microcontrollers - MCU |
| RoHS: | Singula |
| Series: | STM32 |
| Packaging: | Tray |
| Notam: | STMicroelectronics |
| Humor Sensitivus: | Ita |
| Product Type: | ARM Microcontrollers - MCU |
| Factory Pack Quantity: | 360 |
| Subcategoria: | Microcontrollers - MCU |
| Nomen: | STM32 |
♠ Arm® Cortex®-M7 32-bit 550 MHz MCU, usque ad 1 MB Flash, 564 KB RAM, Aer, USB, 3x FD-CAN, Graphica, 2x 16-bit ADCs
STM32H723xE/G machinis in summo perficiendi Arm® Cortex®-M7 nituntur 32 frenum RISC nucleum operantem usque ad 550 MHz.Cortex® -M7 nucleus notat punctum fluitantis unitatis (FPU) quae Arm® praecisionem duplicem (IEEE 754 obsecundantem) sustinet et una praecisio notitiarum processus notitiarum et generum.Cortex -M7 nucleus includit 32 kbytes de cella instructionis et 32 Kbytes de cella data.STM32H723xE/G machinis plenam copiam mandatorum DSP sustinent et unitas tutelae memoriam (MPU) ad securitatem applicationis augendam.
STM32H723xE/G cogitationes memoriae infixae incorporant altae celeritatem cum usque ad 1 Mbyte de Flash memoriae, usque ad 564 Kbytes de RAM (including 192 Kbytes quae communicari possunt inter ITCM et AXI, plus 64 Kbytes exclusive ICM, plus 128 Kbytes exclusive AXI; 128 Kbyte DTCM, 48 Kbytes AHB et 4 Kbytes of tergum RAM), necnon amplitudo amplissima I/Os et peripherales cum APB buses, AHB buses, 2x32-bit multi- bus matricis AHB et multi- strati AXI inter se coniunguntur. memoriam internam et externam aditum sustentans.Ad meliorem applicationis robur, omnes ad memoriam pluma erroris codicis correctionem (unus error correctionis, duorum errorum detectiones).
Core
• 32-bit Arm® Cortex®-M7 CPU cum DP-FPU, L1 cache: 32-Kbyte cella data et 32-Kbyte institutio cache permittens 0-expectare publica executionem ab infixa Mico memoria et memoria externa, frequentia usque ad 550 MHz; MPU, 1177 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1), et instructiones DSP
Memoriae
• Usque ad I Mbyte de embedded Flash memoria cum ECC
• SRAM: tota 564 Kbytes omnes cum ECC, inter 128 Kbytes notitiarum TCM RAM pro critica notitia reali temporis + 432 Kbytes systematis RAM (usque ad 256 Kbytes in instructionem TCM RAM remap potest ad instructiones reales criticas temporis) + 4 Kbytes of tergum SRAM (praesto sunt in infimis potentia modis)
• Flexibile memoriae externae moderatoris cum ad 16 frenum data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND memoriam
• 2 x Octo-SPI interface cum XiP
• 2 x SD/SDIO/MMC interface
• Bootloader
Graphics
• Chrom-ART Accelerator graphice hardware accelerator ens auctus usor graphice interface ad redigendum CPU onus
• LCD-TFT controller supportantes usque ad XGA resolutio
Horologium, reset ac praebeat procuratio
• 1.62 V ad 3.6 V adhibita copia et I/O
• POR, PDR, PVD et BOR
• Dedicavit USB potestatem
• LDO regulator Embedded
• Oscillatores interni: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI.
• Oscillatores externi: 4-50 MHz HSE, 32.768 kHz LSE
Humilis potentia
• Somnus, Siste et Sto modos
• VBAT supplendum pro RTC, 32×32-bit tergum registri
Analog
• 2×16 frenum ADC, usque ad 3.6 MSPS in 16-bit: usque ad 18 canales et 7.2 MSPS in duplici-interleaved modus
• 1 x 12-bit ADC, usque ad 5 MSPS in 12-bit, usque ad 12 canales
• 2 x comparatores
• 2 x amplificator operationalis GBW = 8 MHz
• 2× 12-bit D/A converters
