STM32L431CCT6 ARM Microcontrollers – MCU Ultra-humilis potentia FPU Arm Cortex-M4 MCU 80 MHz 256 Kbytes of Flash
Product Description
| Productum attributum | Precium attributum |
| Fabrica: | STMicroelectronics |
| Product Category: | ARM Microcontrollers - MCU |
| RoHS: | Singula |
| Series: | STM32L431CC |
| Adscendens Style: | SMD/SMT |
| Sarcina / Case: | LQFP-48 |
| Core: | ARM Cortex M4 |
| Programma Memoria Location: | 256 kB |
| Data Bus Latitudo: | 32 bit |
| ADC Consilium: | 12 bit |
| Maximum Horologium Frequency: | 80 MHz |
| Numerus I / Os: | 38 I/O |
| Data Ram Size: | 64 kB |
| Supple intentione - Min: | 1.71 V |
| Supple intentione - Max: | 3.6 V |
| Minimum Operating Temperature: | - 40 C |
| Maximum Operating Temperature: | + 85 C |
| Packaging: | Tray |
| Notam: | STMicroelectronics |
| DAC Resolutio: | 12 bit |
| Data RAM Type: | SRAM |
| Interface Type: | CAN, I2C, LPUART, SAI, SPI, USART . |
| Humor Sensitivus: | Ita |
| Numerus ADC canales: | 10 Channel |
| Numerus Timers / Calculis: | 11 Timer |
| Processus Series: | STM32L4 |
| Productum: | MCU+FPU |
| Product Type: | ARM Microcontrollers - MCU |
| Programma Memoria Type: | Flash |
| Factory Pack Quantity: | 1500 |
| Subcategoria: | Microcontrollers - MCU |
| Nomen: | STM32 |
| Watchdog Timers: | Watchdog Timer, Windowed |
| Unitas pondus: | 0.00782 oz |
♠ Ultra-humilis potentia Arm® Cortex®-M4 32-bit MCU+FPU, 100DMIPS, usque ad 256KB Flash, 64KB SRAM, analog, audio
STM32L431xx cogitationes sunt microcontrolers potentiae ultra-humilis innituntur summo operando Arm® Cortex®-M4 32 frenum RISC nucleum operantem in frequentia usque ad 80 MHz.Cortex-M4 nucleus notat punctum fluitantis unitatis (FPU) una praecisio, quae omnia Arm® una praecisio notitiarum instructionum et notitiarum generum sustinet.Etiam plena copia mandatorum DSP instrumentorum et unitatis memoriam tutelae (MPU) quae applicationem securitatis auget.
STM32L431xx machinae memoriae infixae sunt (Flash memory up to 256 Kbyte, 64 Kbyte of SRAM), a Quad SPI mico memorias interfacies (praesto omnibus fasciculis) et ampla ampliatio I/Os et periphericis duobus APB busibus connexis. duo AHB buses et 32 bis multi- bus matrix AHB.
In STM32L431xx machinae complures machinae tutelae infixae sunt ad memoriam Flash infixam et SRAM: praesidium readout, praesidium scribe, signum proprietatis e praesidio et Firewall.
Cogitationes ieiunium 12-bit ADC offerunt (5 Msps), comparatores duo, unus ampliator operationalis, duo canales DAC, internus intentionis quiddam referentia, humili potentia RTC, unum generale propositum 32-bit timor, unus 16 bis. PWM timer dicatus potestate motori, quattuor generales consilii 16-bit timers, et duo 16 frenum humilis potentiam timentes.
• ultra-humilis potentia cum FlexPowerControl
- 1.71 V ad 3.6 V
- -40 °C ad 85/105/125 °C range temperatus
- 200 nA in VBAT modus: supple pro RTC et 32×32-bit tergum registris
- VIII nA Shutdown modus (V expergisci acus)
- 28 nA Sto mode (5 evigilate fibulae)
- 280 nA Sto modus cum RTC
– 1.0 µA Desine 2 modum, 1.28 µA cum RTC
- 84 µA/MHz modus currunt
- acquisition modus Batch (BAM)
- 4 μs excitare a Sistere modus
- Brown de reset (BOR)
- Interconnect matrix
• Core: Arm® 32-bit Cortex®-M4 CPU cum FPU, Adaptivo reali temporis acceleratori (ART Accelerator™) permittens 0-expectationem status exsecutionis a Flash memoriae, frequentiae usque ad 80 MHz, MPU, 100DMIPS et DSP instructiones.
• euismod velit fermentum
– 1.25 DMIPS/MHz (Drystone 2.1)
– 273.55 CoreMark® (3.42 CoreMark/MHz @ 80 MHz)
• Energy velit fermentum
- 176.7 ULPBench® score
• Pro Fontes
– 4 ad 48 MHz crystallus oscillator
– 32 kHz crystallus oscillator pro RTC (LSE)
- Internus 16 MHz officinas-ornata RC (±1%)
- Interna vis humilis 32 kHz RC (± 5%)
- Internum multispeedum 100 kHz ad 48 MHz oscillatorium, auto- incisum LSE (melius quam accurationem ± 0,25%)
- Internum XLVIII MHz cum horologium convaluisset
– 2 PLLs pro horologii systematis, audio, ADC
• Usque ad 83 ieiunium I/Os, maxime 5 V tolerantes
• RTC cum HW calendario, terroribus et calibrationibus
• Usque ad 21 canales sentiendi capacitivum: fulcimentum tactus, lineari et gyratorii tactus sensoriis
• 11x timers: 1x 16-bit motrices moderatio provectae, 1x 32- frenum et 2x 16 frenum propositum generale, 2x 16- frenum basicum, 2x potentia humilis 16-bit timers (available in Sistere modus), 2x canes, SysTick. timer
• Memoriae
- Ad 256 KB una ripa Flash, codice proprietatis readout praesidium
- 64 KB of SRAM comprehendo 16 KB cum hardware pari reprehendo
- Quad SPI memoria interface
Analog • Rich peripherals (independens copia)
– 1x 12-bit ADC 5 Msps, usque ad 16 frenum cum hardware oversampling, 200 µA/Msps
- 2x 12-bit DAC output canales, humilis-potestatis specimen et custodia
- 1x amplificator cum operational constructum- in PGA
- 2x ultra-humilis potentia comparatorum
• 16x communicatio interfaces
- 1x SAI (Vide audio interface)
– 3x I2C FM+(1 Mbit/s), SMBus/PMBus
– 4x USARTs (ISO 7816, LIN, IrDA, modem)
- 1x LPUART (Desine 2 excito)
- 3x SPIs (et 1x Quad SPI)
- POTEST (2.0B Active) et SDMMC interface
- SWPMI unum filum protocol dominus I / F
- IRTIM (Infrared interface)
• 14- alveum DMA controller
• Verum temere numerus generantis
• CRC unitas calculi, 96-bit singularis ID
• progressio subsidium: Vide filum debug (SWD), JTAG, Embedded Trace Macrocell™
