TMS320LF2406APZA Digital signum processors et moderatoris DSP DSC 16Bit fixa-Pt DSP cum Flash
Product Description
| Productum attributum | Precium attributum |
| Fabrica: | Texas Instrumenta |
| Product Category: | Digital Signum Processores & Moderatores - DSP, DSC |
| RoHS: | Singula |
| Productum: | DSCs |
| Series: | TMS320LF2406A |
| Nomen: | C2000 |
| Adscendens Style: | SMD/SMT |
| Sarcina / Case: | LQFP-100 |
| Core: | C24x |
| Numerus Cores: | 1 Core |
| Maximum Horologium Frequency: | 40 MHz |
| L1 Cache Instructio Memoria: | - |
| L1 Cache Data Memoria: | - |
| Programma Memoria Location: | 64 kB |
| Data Ram Size: | 5 kB |
| Supple intentione operating: | 3.3 V |
| Minimum Operating Temperature: | - 40 C |
| Maximum Operating Temperature: | + 85 C |
| Packaging: | Tray |
| Notam: | Texas Instrumenta |
| Data Bus Latitudo: | 16 bit |
| I/O intentione: | 3.3 V, 5 V |
| Instructio Type: | Certum punctum |
| Humor Sensitivus: | Ita |
| Product Type: | DSP - Digital signum Processors & Controllers |
| Factory Pack Quantity: | 90 |
| Subcategoria: | Embedded Processors & Controllers |
| Pars # Aliases: | DHDLF2406APZA TMS320LF2406APZAG4 |
| Unitas pondus: | 0.022420 oz |
Princeps euismod CMOS Technology Static
− 25-ns Instructio Cycli Time (40 MHz)
40-MIPS euismod
Low-Power 3.3-V Design
Ex TMS320C2xx DSP CPU Core
Code-Compatible With F243/F241/C242
Instructio Set ac amet compatible cum F240
Flash (LF) and ROM (LC) Device Options
LF240xA: LF2407A, LF2406A, LF2403A, LF2402A
− LC240xA: LC2406A, LC2404A, LC2403A, LC2402A
De-Chip Memoria
Ad 32K Verba x 16 Frena Flash EEPROM (4 Sectors) or ROM
Programmable "Codex Securitatis" Feature pro De-Chip Flash/ROM
Usque ad 2.5K Verba X XVI Frena Data / Program RAM
544 Verba Dual-Access RAM
Ad 2K verba Single-Access RAM
Tabernus ROM (LF240xA Devices)
SCI/SPI Bootloader
Usque ad Duo Event-Manager (EV) Modules (EVA et EVB), Singulae:
Duo XVI-bit Generalis Propositum Timers
octo XVI-Bit Pulsus Latitudo Modulation (PWM) canales Qui Admitte:
Tres-Phase Inverter Control
Center- vel Edge-alignment of PWM canales
Subitis PWM Channel Shutdown Cum externo PDPINTx Pin
Programmable Deadband (Deadtime) prohibet germen-per culpas
Tres Capture Unitates pro tempore instraturae externi Events
Input Qualifier for Selecta acus
De Chip Position Encoder interface Circuitry
Synchronised A-ad-D Conversionem
Designed for AC Induction, BLDC, Switched Invitus, and Stepper Motor Control
Lorem multiple motor et / vel converter Imperium
Memoria externae instrumenti (LF2407A)
− 192K Verba x 16 Bits of Total Memoria: 64K Programma, 64K Data, 64K I/O
Watchdog (WD) Timer Module
10-bit Analog-ad-Digital Converter (ADC)
VIII vel XVI Multiplexus potenti canales
D-ns MIN Conversio Time
Selectable Didymus VIII-re publica Sequencers Urguet duae Vicis administratores
Area moderatoris Network (CAN) 2.0B Module (LF2407A, 2406A, 2403A)
Vide Communications interface (SCI)
16-Bit Serial interface periphericum (SPI) (LF2407A, 2406A, LC2404A, 2403A)
Phase-Loop-Loop (PLL) -Based Pro Generatione
Usque ad 40 Individue Programmabiles, Multiplexus Generalis-Propositum Input/Output (GPIO) acus
Usque ad quinque externae interpellationes (Power Coegi Praesidium, Reddere, duae Maskable obloquitur)
Potestas Management:
Tres Power-Down Modi
Potestas est quisque periphericis Independenter
Real-time JTAG-Compliant Scan Substructio Emulationis, IEEE Standard 1149.1† (JTAG)
Instrumenta progressio Includunt:
− Texas Instrumenta (TI) ANSI C Compiler, Assembler/Linker et Code Composer Studio Debugger
volutpat amet
Scan Substructio Self-Emulation (XDS510)
Lata Tertia-Pars Digital Motor Imperium Support
Sarcina Options
144-pin LQFP PGE (LF2407A)
100-Pin LQFP PZ (2406A, LC2404A)
− 64-PIN TQFP PAG (LF2403A, LC2403A, LC2402A)
64-Pin QFP PG (2402A)
Protractum Temperature Options (A et S)
− A: 40°C ad 85°C
S: 40°C ad 125°C
